Computers and automation are everywhere today and their value to DoD’s productivity and efficiency are immeasurable. However, all of these computers and their components require inspection and sometimes repair or replacement to keep operating smoothly. Circuit card testing and repair involves the use of diagnostic troubleshooting tools and the development of high-quality diagnostic test routines. DoD maintenance activities have developed some innovative techniques for complex faultfinding, testing and repair of circuit cards for the many types of equipment within the DoD. This forum will look at some of the newest technology and techniques that the DoD community uses to help maintain DoD computers.
JTEG Forum Minutes
Event: On 29 May 2018, the Joint Technology Exchange Group (JTEG), in coordination with the National Center for Manufacturing Sciences (NCMS), hosted a virtual forum on “Circuit card Test and Repair”.
Purpose: The purpose of this forum was to provide an overview of the innovative techniques the DoD maintenance community has developed to perform complex faultfinding, testing and repair of circuit cards for the many types of equipment within the DoD.
Welcome: Ray Langlais (LMI) welcomed everyone to the forum, thanked the presenters and all the listeners for their attendance, and briefly previewed the agenda.
Administrative: This was an open forum. The presentations, along with questions and answers, were conducted through Adobe Connect. A separate audio line was used. Approximately 35 participants from across DOD and industry joined in the forum.
Circuit Card Testing & Repair – Richard Foley (Tobyhanna Army Depot) provided an overview of Tobyhanna Army Depot’s mission and circuit card test and repair capabilities, to include overhaul and repair. Testing capabilities include ATE system design and test software development, configuration management for all test programs/ATE, in-circuit testing, and automated continuity test systems. Repair capabilities include printed circuit board rework/ repair and reverse engineering of circuit cards. The way forward includes a Surface Mount Technology (SMT) rework laboratory, replacing the 2D X-Ray Inspection System by adding 3D Partial Computerized Tomography capabilities, and upgrading the Automated SMT Rework System.
Capability to Isolate NFF – Richard Thompson (Ridgetop Group) briefed about a No Fault Found (NFF) Reduction Toolbox Solder Joint Built-in Self-Test (SJ BIST) for Cable Intermittencies capability. The Nighthawk Software Platform provides a data management and data analysis toolbox that is test system / test platform independent. Some of the features and benefits of the SJ BIST include: detects solder ball fractures prior to catastrophic failure, detects micro-cracks in die, provides actionable maintenance data, has been independently tested and verified, and is endorsed by leading automotive and aerospace customers.
“Gold Disk Repair” Update – Rich McConnell (NAVSEA) provided an update on the Miniature/Micro-miniature (2M) Module Test & Repair (MTR) program which he briefed back in 2015. Technicians are provided with special purpose test equipment, 2M repair equipment, Gold Disk diagnostics and repair procedures to support circuit card assemblies (CCA) and electronic modules (EM) repairs. MTR GOLD DISK provides logistics information and computer aided diagnostics procedures in support of 2M MTR processes. 2M MTR improves readiness, self-sufficiency and sustainability of systems/equipment . From April 1996 to the end of CY 2017 Navy commands outfitted with 2M MTR capabilities reported over 211,000 repairs, which resulted in 13,000+ CASREPS averted or corrected and $770+M in OPTAR cost avoidance.
Circuit Card Test & Repair: Keyport – Tony Arnold (NUWC) described how Keyport’s mission of rapid prototyping, fabrication, and manufacture support circuit card testing and repair. Capabilities include circuit board fabrication, component placement and stuffing, hybrid integrated circuit fabrication, flow solder and infrared, and multi-layer/surface mount. Tony also described Assembled Replacement Integrated Circuits (ARICs), which are miniature, IC-sized Printed Circuit Board (PCB) assemblies which serve as drop-in replacements for failed or obsolete parts and have been fully qualified for military environments and are in use in the field.
Q&A – The combined Q&A session occurred after the last briefer was finished. For the actual questions and answers, see the Circuit Card Test & Repair Q&A document.
Closing Comments: Ray Langlais thanked the presenters for their contributions and the audience for their participation. He suggested continuing the information exchange beyond the forum and the importance of collaboration within the DoD maintenance community.
- All of the briefings are cleared for “public release” and are posted on the JTEG website at http://jteg.ncms.org/ .
Next JTEG Meeting: The next scheduled JTEG virtual forum is 26 June, 1:00 – 3:00 pm EST. The topic is “AFMC/AFRL”.
POC this action is Ray Langlais, firstname.lastname@example.org , (571) 633-8019
Tobyhanna Army Depot – Richard Foley
Q1. What are the most common faults and repairs experienced with circuit cards at TYAD?
A1. Component failures, trace failures. It is dependent on where they came from and what use. i.e. the environment or ballistic damage. Some are disposed, remove and replaced, if production line is still open.
Q2. Do you use any boundary scan technology or have those type tools?
A2. Refer to slide eight and the HP3070. We can do boundary scan. However, depot technology lags behind industry by a number of years primarily due to little to no requirements existing yet. Part of the issue is that the card has to be designed for boundary scan.
Ridgetop Group – Richard Thompson
Q1. For Night Hawk. Several pieces of information that were referred to will be stored in a PDM/PLM system as the authoritative technical data. What PDM/PLM systems do you interface with?
A1. VDATS. I understand there is one source for schematics and another source for other information. We added an IT component to allow people to store the annotations, etc. It is not to replace PLM, just provide customers what they asked for. The function can be disabled.
Q2. How does SJ BIST work? Is it IP downloaded into an FPGA?
A2. Solder joint built-in self-test. Circuit boards are subjected to vibration and fault diagnosis. We took a time-centered approach. It is not limited to FPGA, we just used it in this case.
Q3. What types of ESS Testing do they perform?
A3. That depends on what the customer wants performed…basic testing, temperature, environment, and training. The application engineers can design to the customer requirements.
Q4. Have you found a way to simulate environmental impacts and a method to track those?
A4. We have applied it to many items. The scope has been limited to WRAFB and we augmented VDATS and simulated environmental impacts.
“Gold Disk Repair” Update – Rich McConnell (NAVSEA)
Q1. No Questions
Keyport – Tony Arnold (NUWC)
Q1. For Keyport, Have you had any contacts with the DoD Microelectronics Agency and their GEM Technology?
A1. Similar idea to ARIC.