On 19 January 2016 the JTEG will conduct a technology forum on “Integrated Circuit Test, Repair and Re-Manufacturing”. The purpose of the forum is to share information on new and developing capabilities designed to test and/or repair/replace integrated circuits, with the goal to improve equipment operational availability, ensure IC lineage, combat obsolescence and to significantly reduce the turn-in of No Fault Found (NFF) /Can Not Duplicate (CND) of certain electronic modules and shop replaceable assemblies to the depot. The forum discussion will include low cost test routines that can be developed and fielded quickly, drop-in replacements for obsolete integrated circuits, and detection of defective and counterfeit integrated circuits.
1300-1309: Welcome and Overview – Greg Kilchenstein (OSD-MPP)
1309-1310: Administrative Notes – Debbie Lilu (NCMS)
1310-1335: Circuit Card Test and Repair Systems (CCTARS) Team – Chris Zarycki (Lakehurst)
1335-1400: Assembled Replacement Integrated Circuits (ARICs) from – Corey Kopp (NUWC Keyport)
1400-1425: Detection & Prevention of Counterfeit / Defective Electronic Integrated Circuits using NOKOMIS Advanced Detection of Electronic Counterfeits (ADEC) Sensor System – Dave Bryan Neva (FRC-SW)
1425-1450: Miniature/Micro-miniature (2M) Electronic Repair and Module Teat & Repair (MTR) Gold Disk Programs – Rich McConnell (NAVSEA 04RM33)
1450-1500: Wrap-up and JTEG Principals Comments
Event: On 19 January, 2016, the Joint Technology Exchange Group (JTEG), in coordination with the National Center for Manufacturing Sciences (NCMS), hosted a virtual forum on “Integrated Circuit Test, Repair, and Re-Manufacture”.
Purpose: The purpose of the forum was to provide information and exchange ideas on integrated circuit test, repair, and re-manufacture projects and techniques, the challenges, and the tools and processes being employed by DoD maintenance activities and supporting activities.
Welcome: Greg Kilchenstein (OSD-Maintenance), welcomed everyone to the forum and emphasized the importance of integrated circuit (IC) test, repair, and re-manufacture. Testing and repairing ICs can be extremely difficult and may involve multiple challenges and/or repair methods depending on the material being repaired, the environmental considerations, the time involved, and the impact on costs and readiness.
Administrative: This was an open forum. The presentations, along with questions and answers, were conducted through Defense Collaboration Services (DCS) and an audio line. Approximately 50 participants from across DoD and industry joined in the forum. Questions were sent through DCS and answered by the presenters during the forum.
Circuit Card Test and Repair Systems (CCTARS) Team – Chris Zarycki and Mike Dunne (Lakehurst) presented an information briefing on the CCTARS Program which is designed to improve equipment Operational Availability and eliminate the turn-in of No Failures Evident (NFE)/Can Not Duplicate (CND) of certain Electronic Modules (EMs) and Shop Replaceable Assemblies (SRAs) to the Depot. The AN/USM-676(V)2 PinPoint, AN/USM-674(V)3 Protrack and the CCR2000 systems are the support equipment tools they identified are used in the CCTARS program. CCTARS advantages include low cost SRA test routines, shorter development time, quicker fielding of test routines, a small footprint, and it is currently fielded ashore and afloat. Potential program cost avoidance within the Navy is well over $44M.
Assembled Replacement Integrated Circuits (ARICs) – Corey Kopp (NUWC Keyport) briefed the ARIC capability which is a finalist from the 2015 DoD Maintenance Innovation Challenge (MIC). ARIC uses miniature, IC-sized Printed Circuit Board (PCB) assemblies designed/fabricated to replicate the function of obsolete ICs (chip-level emulation), and VDHL (VHSIC Hardware Description Language) programming that allows designs to be more cost-effectively transitioned to new technologies, significantly minimizing future obsolescence resolution costs. Other benefits include the preservation of system supportability – thus avoiding costly redesign of the subassembly or parent system, service life extension (SLEP) decisions, serves as a new source for the function of an IC, “plugs and plays” into the same place as the original, and is transparent to the higher level assembly.
Detection & Prevention of Counterfeit / Defective Electronic Integrated Circuits using NOKOMIS Advanced Detection of Electronic Counterfeits (ADEC) Sensor System – Bryan Neva (FRC-SW) gave a presentation on a second MIC finalist – the NOKOMIS ADEC system. The ADEC system is a new counterfeit & defective IC detection technology developed from over $16 M in DoD SBIR funding. In demonstrations it has shown to be 99% Effective. FRCSW estimated savings per year are $6.8M with an ROI over 10 years of 2000%. FRCSW envisions introducing the NOKOMIS ADEC technology into all DoD depot repair facilities as the standard counterfeit IC detection technology.
Miniature/Micro-miniature (2M) Electronic Repair and Module Teat & Repair (MTR) Gold Disk Programs – Rich McConnell and Tom Ingram (NAVSEA 04RM33) gave a presentation on the NAVSEA 2M MTR program. The program provides ships and shore activities with capabilities to repair circuit card assemblies (CCA) and electronic modules (EM). Technicians are provided with special purpose test equipment, 2M repair equipment, Gold Disk diagnostics and repair procedures and piece parts to support CCA and EM repairs. 2M MTR benefits include improved readiness and sustainability of systems/equipment, reduced operating target costs, reduced requirements for wholesale and retail spares, minimizes diminishing manufacturing sources and material shortages (DMSMS) issues, minimizes “No Failure Evident” cards being sent to depots, and reduces tech assists from off ship/base tech reps. Ongoing initiatives include developing Gold Disks for Fleet nominated and high cost/high failure, out of production and low in stock CCA/EMs, and the phased replacement of existing 2M equipment and test systems.
Closing Comments: The JTEG Principals thanked the presenters for their briefs and the audience for their active participation in the Q&A, and noted the importance of collaboration amongst the military Services and agencies. It is obvious that these capabilities show a great deal of potential. However, it is also noticeable that these capabilities are having difficulty expanding beyond their activity or Military Service. Increased collaboration and exchange of knowledge amongst the Services and industry would significantly benefit the expansion of these capabilities. The JTEG will assist by providing a vehicle in which to exchange the available information.
Presentation Slides and Questions & Answers: These meeting minutes, the Q&A, and those briefing slides approved for public release, will be posted on the JTEG website at http://jteg.ncms.org/ .
Next JTEG Meeting: The next JTEG virtual forum is 26 January 2016, 1:00 – 3:00 pm EST. The topic is “Maintenance Innovation Challenge (MIC) Finalists’ where the remaining three MIC finalists will present their capabilities on “Voice Directed Technology for Inspection Operations”, “Phased Array Ultrasonic Testing”, and Automated Debris Analysis for At-line Maintainers”.
POC this action is Ray Langlais, firstname.lastname@example.org , (571) 633-8019
Questions & Answers
CCTARS (Chris Zarycki & Michael Dunne – Lakehurst)
Q1. Any idea of the annual circuit card repair cost at Lakehurst?
A1. It varies by the type of card. We don’t perform repairs at Lakehurst – we provide the diagnostic tool.
Q2. To what degree is Additive Manufacturing utilized?
A2. We suggest the repair by determining what could be faulty. We don’t do the repair and we don’t use AM.
Q3. How is the CCTARS Team funded? A3. Funding did come from PMA260 CAS. CAS is now gone. We are currently funded with RTOC funds which end in FY17. We are looking for direct platform funding.
Q4. Do you do joint service work?
A4. Yes. We talk with the USAF and USCG on Pinpoint for example.
Q5. How do customers know that CCTARS team is available to help solve their problems?
A5. We have discussed this. We are planning a possible base tour and going to the PMAs. Cost avoidance is estimated to be well over $44M in the Navy alone, so there should be interest.
Q6. How does the CCTARS team work with the Executive Agent for ICs at Crane?
A6. The platform for EA218 is a big supporter of test routines with a good maintenance plan. He reached out to us and we are working on a SOW.
ARICS (Corey Kopp – NUWC Keyport)
Q1. How heavily are “3D Scanners” used for the reverse engineering of parts at Keyport?
A1. We do not employ 3D scanners with what we do, but they are used in other areas in Keyport. I don’t know the quantity or percent.
Q2. Where do you envision the library being housed & who would manage?
A2. Not sure
Q3. Is there a joint working group on integrated circuit card test, repair, and re-manufacture?
A3. I’m not aware of it. There may be a gap there.
Q4. Do the folks that do CC testing work in the same space as those who work CC repairs or the repair of the higher assemblies?
A4. No, those tasks are not co-located, but there is dialogue between the different sections.
NOKOMIS ADEC (Bryan Neva (FRC-SW)
Q1. Is it feasible to expand the use NOKOMIS capabilities to determine if non IC parts are counterfeited or not. Example: V-22 Fuel Nozzle?
A1. No, not for a fuel nozzle. It would be a very, very low TRL level. For example, the project described in the brief was a TRL 8. It is not designed for the type of use that a fuel nozzle would require.
Q2. How much does the NOKOMIS System cost?
A2. $385,000 for the NOKOMIS ADEC System. The fixtures (sockets) are very reasonably priced from $100-250.
Q3. Is anyone familiar with DLA using this capability as a Q/A tool upstream in supply?
A3. We would love to get DLA on board. There is interest. They are reviewing a specification, but DLA is not currently using it.
Q4. Could NOKOMIS be used effectively on a ship? Could ship motion, heat, and humidity result in a bad scan?
A4. Yes, NOKOMIS could be used effectively on a ship.
Q5. Can compliant ICs be tested periodically with NOKOMIS to determine if the IC is degrading and should be replaced prior to failing?
A5. Yes. There is work that uses ADEC for prognostics. In terms of setting a threshold for degradation, the answer is yes, we do see it taking place.
2M & MTR Gold Disk Programs (Rich McConnell – NAVSEA)